VECTOR VX1000 ARM TPIU Trace Microcontroller

Speċifikazzjonijiet

• Product Name: VX1000 ARM TPIU Trace
• Verżjoni: 1.0
• Data: 2025-08-29
• Author: Dominik Gunreben

Informazzjoni dwar il-Prodott:

• The VX1000 ARM TPIU Trace is a tool used for measurement and calibration setups of microcontrollers. It provides a parallel trace port with single- or multi-pin data paths and a clock pin.
• All signals are single-ended.

TPIU Trace Overview:

• The TPIU Trace Interface consists of a parallel trace port with various pins, including Trace Clock and Data Pins 0-3. The Trace Clock typically operates at frequencies ranging from 25 MHz to 125 MHz, with data pins using DDR signaling for increased data rates.

TPIU Trace Protocols:

• To enable the TPIU Trace, configuration within the ECU software is necessary. This includes pin configuration, multiplexer configurations, and trace clock configuration. Detailed instructions for these configurations can be found in the user manual.

Istruzzjonijiet għall-Użu tal-Prodott

1. Setting up TPIU Trace:
   • To use the TPIU Trace Interface, follow these steps:
   • Connect the TPIU Trace pins according to the specified pin assignments.
   • Configure the ECU software settings for the Trace Pins interface as per VXconfig settings.
2. Konfigurazzjoni tal-pin:
   • Configure the trace data pins and clock pin based on the target controller specifications. Refer to the provided code examples għall-għajnuna.
3. Multiplexer Configurations:
   • If your evaluation board or ECU has multiplexers or DIP switches, ensure they are configured to select the TPIU-Trace. Refer to code examples for different evaluation boards.
4. Trace Clock Configuration:
   • Set up the Trace Clock frequency by selecting the appropriate clock source and setting a divider to achieve the desired frequency. Refer to the user manual for detailed instructions.

VX1000 ARM TPIU Trace

• ARM specifies a parallel target interface for its microcontrollers.
• Depending on the frequency and the number of trace pins used, a significant measurement bandwidth can be achieved with the TPIU Trace Interface.
• Sometimes the TPIU trace is also referred to as Trace-Pin-Interface or ETM-Trace-Interface.
• The TPIU Interface is a unidirectional interface from the target controller to the Debugger/Measurement Hardware.
• The TPIU Interface cannot be used standalone but an additional target interface like SWD or JTAG is required for write accesses to the target.

TPIU Trace Overview

• The TPIU Trace Interface provides a parallel trace port with a single- or multi-pin data path and a clock pin.
• All signals are single ended.

TraceCLK:

• Trace Clock. Typical frequencies are 25 MHz .. 125 MHz.
• The TraceDx uses DDR signaling, transferring data on both clock edges to double the effective data rate. So, when in this document a Trace Clock frequency of 25 MHz is used, the data rate on each data pin is 50 Mbit/s.

TraceD0-TraceD3:

• Data Pins 0..3. If other target interface connectors are used, even more Trace Data Pins can be used if this is supported by the target controller (see 5.4 Typical connector used for TPIU Trace).

TPIU Trace Protocols

• The protocols used on the interface may differ depending on the target controller and the use cases.
• Typically, the TPIU Protocol is used as a container format for multiple data streams.
• Data streams wrapped in the TPIU protocol can be ARM protocols like Embedded Trace Macrocell (ETM), Instrumentation Trace Macrocell (ITM) or System Trace Macrocell (STM).
• The VX1000 hardware can decode the TPIU and encapsulated protocols on the fly.
• VX1000 and the VX1000 Application Driver use ETM, IT, M and STM to acquire measurement data efficiently.

ECU software configuration

• To enable the TPIU Trace, some configuration within the ECU software must be done.

Ħjiel:

• The VXconfig settings for the Trace Pins interface, which are referenced in the following sections, can be found in VXconfig VX1000 device->POD->Trace Pins

Konfigurazzjoni tal-pin

• Typically, there are no dedicated trace pins on the target controller, but the trace functionality is multiplexed with other peripheral functionalities on the same pin.
• To reduce the chance that the trace cannot be used as some required pins are blocked by other functionalities, the same trace-pin functionality is often routed redundantly to different pin groups.
• To enable trace, the target controller must be configured to provide pins with trace functionality, and the target PCB must be designed accordingly.
• Kodiċi examples for pin configuration for different target controllers can be found in “4. Code Examples for TPIU Configuration”.
• These trace pins include the trace data pins (Trace_Data) and the Clock (Trace_Clk) pin. The supported number of trace data pins for the different VX1000 hardware can be found in 5.8 Possible TPIU Setups.
• Multiplexer configurations
• If your evaluation board or ECU has multiplexers or DIP switches outside the controller to switch between different peripheral connections, those must be configured as well to select the TPIU-Trace.
• See “4. Code Examples for TPIU Configuration” for examples of different evaluation boards.
  Trace Clock configuration
• Besides the Trace-Clock pin configuration addressed in “2.1 Pin configuration”, the Trace_Clk must be configured to operate at the desired frequency.
• Typically, the clock tree contains a multiplexer to select from different clock sources, and frequency dividers to decrease the source frequency. Select the clock source and set a divider to achieve the desired frequency.
• To verify the TPIU Clock configuration, the VX1000 system measures the detected Trace_Clk signal and shows the result in VXconfig.
• The values are updated on VX1000 reset or ECU reset. So, there is no need to connect an Oscilloscope to double-check the TPIU frequency.
• The VX1000 provides three ways to configure the TPIU Clock, which are described in the following sections.
• The registers that are configured for TPIU Clock MUX and Divider are explained in “4. Code Examples for TPIU Configuration” for the specific controllers.
• Either the VX1000 hardware can configure the registers from the outside through JTAG/SWD (see 2.3.1 and 2.3.2), or the registers are configured by the application (see 2.3.3).
• Use VX1000 defaults
• When using “VX1000 defaults”, the VX1000 hardware configures the multiplexer and clock divider in the target in an educated guess approach.
• Typically, clock sources are selected that are expected to be in use in the target, like clocks for cores or the system clock.
• The VX1000 uses the divider, which results in the maximum possible Trace_Clk frequency supported by the controller.
• Because the controller and especially the clock tree can be configured in different ways, this setting will not always lead to the expected results.
• Use the “Last detected frequency” information in VXconfig to verify the resulting frequency. If the trace clock is not as expected, see the following sections.

VXconfig settings

• If actual values are provided in VXconfig, the VX1000 hardware will set TPIU Clock MUX and TPIU Clock Divider without the need to modify the ECU software.
• This allows an easy probing of different settings. Use the “Last detected frequency” to verify that the resulting frequency meets your expectations.

Use ECU settings

• While with the previous configuration modes the VX1000 hardware actively configures the TPIU Clock in the target, the VX1000 can also be put in passive mode by selecting “Use ECU Settings”.
• In this case, the ECU software must configure the complete Trace Pin interface, as the VX1000 will not modify the clock configuration.
• Please note that the trace sources like STM500, ETM and ITM are still configured by the VX1000 and must not be accessed by the ECU application.

Tip: To verify your settings, boot the target system with the VX1000 disconnected and check with an oscilloscope that the Trace_Clk pin on the target connector is toggling at the expected rate.

VX1000 Application Driver configuration

• To use the ARM TPIU trace feature, the VX1000 Application Driver must be included into the Target Controller software. This software is delivered as source code and can be integrated easily.
• The required configuration options that are needed for the TPIU Trace are listed here. Target controller-specific settings are listed in “4 Code Examples for TPIU Configuration“ in the “Target Specific Application Driver Configuration” sections.

Konsiderazzjonijiet ta' prestazzjoni

• The measurement methods used with the TPIU Trace interface are all copy-based approaches.
• This means that the data must be copied by the CPU from its original location to a destination where the Trace messages are generated and sent via the TPIU interface.
• The involved trace protocols also consume some bandwidth of the target interface and must be considered.
• Please note that our OLDA copy methods typically consume a CPU runtime of

Target Interface Bandwidth

• Due to the number of different setups, the following table provides an overview of actual target interface bandwidth. Bandwidth Examples of STM500

Stalling

• All the trace protocols utilizing the TPIU Interface are configured by the VX1000 in such a way that stalling is enabled. This means that no data can get lost due to target interface bandwidth limitations.
• If the data is copied faster than the interface bandwidth, the CPU is stalled/paused until there is space available on the target interface.
• The trace paths typically include buffers that help smooth out copy bursts, thereby reducing the likelihood of stalling. Please consult the target reference manual of your controller for details.
• As a result, the TPIU interface should be used with the maximum possible frequency and as many trace pins as possible to minimize the negative effects of stalling.

Kodiċi Eżamples for TPIU Configuration

• The pseudo-code examples in the section should give you hints on how to configure the TPIU-Subsystem in preparation for DAQ measurement and calibration use.

Strumenti ta' Texas

• The Pseudo Code examples use names from the TI-SDK ,which is copyrighted of Texas Instruments. Please refer to the TI-SDK documentation.

AM263

• AM263 TPIU Specification
• AM263 Trace-Pin configuration

Additional Hints:

• Pins must be configured with PIN_SLEW_RATE_HIGH
• AM263 Target Specific Application Driver Configuration

Pseudo-Code

J6E

J6E TPIU Specification

J6E Trace-Pin configuration

Additional Hints:

• For high clock frequencies, configure the outputs with PORT_DRIVE_STRENGTH_15

J6E Target Specific Application Driver Configuration

VX1000_MEMSYNC_TRIGGER_PTR

• // #define VX1000_MEMSYNC_TRIGGER_PTR <user defined>
• For this chip, VX1000 uses ETM trace and can work with any arbitrary 16 byte block of writeable address space (8 byte aligned), which is used exclusively by the application driver.
• If you do not define VX1000_MEMSYNC_TRIGGER_PTR, this block is automatically allocated within the gVX1000 memory range.
• It may be possible to improve measurement throughput by defining VX1000_MEMSYNC_TRIGGER_PTR and providing a buffer in faster (TCM) or cached memory.

TDA4M/J721E

• TDA4 TPIU Specification
• TDA4 Trace-Pin configuration

Additional Hints:

• Access from MCU cores to STM500 goes through the R5-RAT address translation module. The application driver setting VX1000_MEMSYNC_TRIGGER_PTR is an address in the MCU address space and must translate to address 0x0009000110 in MAIN
• address space (which is a stimulus port of the STM-500 trace unit). In the example below, the RAT is programmed to use the same address in both domains.
• TDA4 Target Specific Application Driver Configuration
• VX1000_MEMSYNC_TRIGGER_PTR
• #define VX1000_MEMSYNC_TRIGGER_PTR (0x09000000 + 0x110)

Pseudo-Code

VX1000 hardware adaptation

• The hardware connection is driven by the number of pins, used trace frequency and the used VX1000 hardware. In the following section, possible target controller connectors are explained alongside a description how a setup with the VX1000 can look like.
• Available VX1000 adapter and Evalboard Evaluation Kit Heads (EEK-Heads) are described, and possible use cases are explained.

Voltaglivelli e

• The TPIU Interface cannot be used standalone but an additional target interface like SWD or JTAG is required for write accesses to the target.
• In some situations, the voltage levels of the SWD/JTAG interface and the TPIU pins differ because different banks of the target controller are used, and different I/O banks may have different voltage livelli.
• Setups that can cope with different voltage levels are explicitly highlighted.

Flat Ribbon cables

• Many setups are designed in a way that flat ribbon cables can be used. This ensures an easy, flexible, and cheap way to connect the VX1000 POD with the evaluation board/ECU. The maximum frequency allowing stable communication is limited to 100 Mhz.
• Even though flat ribbon cables can easily be made at any desired length, they should always be kept as short as possible to avoid interference.
• Flex-Ribbon cables are mostly symmetrical, meaning that both ends have the same number of pins/cables.
• An asymmetrical usage is also possibl,e meaning that one side has more pins connected as the other side. This allows the flexible adaptation of e.g., a 44-pin connector to a 20-pin connector.

Customized Flex PCB

• For projects in which the flat ribbon cables do not suffice, Vector provides a development service to design and manufacture customized Flex-PCBs to meet the project requirements.

Typical connector used for TPIU Trace

• To mark Pins with special meaning these colors are used

ARM Coresight 20

• Link to ARM specification: https://developer.arm.com/documentation/100893/1-0/Target-interface-connectors/CoreSight-20-connector

ARM Mictor 38

Link to ARM specification: https://developer.arm.com/documentation/100893/1-0/Target-interface-connectors/Mictor-38-connector

Signals not used by the VX1000:

• DBGRQ
• DBGACK
• EXTTRIG
• RTCK
• TRACECTL

ARM MIPI60

• Link to ARM specification: https://developer.arm.com/documentation/100893/1-0/Target-interface-connectors/MIPI-60-connector

Vector “Coresight 44”

• The Coresight 44 connector is a Vector-defined connector. This connector is used as Target Interface Connector on the relevant EEK-Heads and PODs.

Vector Adapter

• Vector provides adapters for the most important target connectors to simplify the usage of the TPIU Interface in combination with the VX1000.

VX1940.10: Mipi 60 Adapter

VX1940.11: Mictor 38 Adapter

Vector EEK Heads
VX1902.09 EEK Head

• The hardware adaptation for the TPIU/Trace interface is typically realized via the VX1902.09 Head.
• Coresight 44
• Vector-proprietary POD Connector

Vector Flex Adapter

• The connection between the POD and the EEK Heads is realized with a Flex Adapter VX1901.01.

Possible TPIU Setups

• Setups for VX1453

Nota

• The VX1453 POD supports TPIU trace from hardware revision 7.0 onwards.

Coresight 20 Setup

Asymmetric Flat Ribbon cable

MIPI 60 Setup Flat Ribbon

Flat Ribbon cable 44:44 Pin

Customized FlexPCB Setups

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Dokumenti / Riżorsi

VECTOR VX1000 ARM TPIU Trace Microcontroller [pdfManwal tal-Istruzzjonijiet VX1000, VX1000 ARM TPIU Trace Microcontroller, ARM TPIU Trace Microcontroller, Trace Microcontroller, Microcontroller

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